1. Field of the Invention
The present invention generally relates to methods and systems for determining a position of a defect in an electron beam image of a wafer.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a large number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing (CMP), etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield in the manufacturing process and thus higher profits. Inspection has always been an important part of fabricating semiconductor devices such as ICs. However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the devices to fail.
Defect review typically involves re-detecting defects detected as such by an inspection process and generating additional information about the defects at a higher resolution using either a high magnification optical system or a scanning electron microscope (SEM). Defect review is therefore performed at discrete locations on the wafer where defects have been detected by inspection. The higher resolution data for the defects generated by defect review is more suitable for determining attributes of the defects such as profile, roughness, more accurate size information, etc.
In order for defect review to provide useful information about the defects that are reviewed, when performing defect review for a particular defect detected by inspection, the defect review process or tool must be able to ensure that the area on the wafer being imaged during the defect review process actually contains the defect being reviewed. However, not all defects that are detectable on an optical inspection system are also detectable on a electron beam defect review system. For example, it may not be possible to generate images of some actual, or real, defects that are detected by an optical inspection system such as previous layer defects in electron beam images. In one such example, it is generally not possible to generate electron beam images of anything below the upper surface of a wafer because electrons do not penetrate below the upper surface of the wafer. Real defects that are detected by optical inspection but cannot be redetected in electron beam images are generally referred to as SEM non-visuals, or “SNVs.” Therefore, when trying to redetect a defect in an electron beam image that cannot actually be imaged by an electron beam tool, it can be impossible to determine if the actual defect location has been found but the defect cannot be imaged by the electron beam tool or if the actual defect location has not been found because the defect has not been redetected in the predicted location (i.e., the predicted location is incorrect). In addition, since many patterns repeat in designs formed on wafers, and sometimes within a relatively small area on a wafer (as relatively small patterns repeat at substantially small periods throughout an array region of some designs for wafers), it can be difficult to determine if the correct defect location has been found in an electron beam image even if a defect is redetected (e.g., because the pattern(s) at or near which a defect was detected occur in multiple instances in the same electron beam image generated for the determined defect position).
Currently, there is no known utility to automatically predict the location of SNVs in an electron beam image on array (e.g., SRAM) regions based on the location of the defect detected by an inspection tool. Experienced users may perform electron beam image to optical image correlation manually and use the defect location accuracy of the defects that are detectable in electron beam images to come up with a reasonable prediction of the exact locations of real SNVs on electron beam images.
There are, therefore, several disadvantages to the currently used methods for relocating defects detected by inspection in defect review. For example, the currently used methods can work only if the defect lies in a logic region, where many patterns are unique relative to other patterns a relatively small area and can therefore be used for defect relocation, or if the defect signal is visible in an electron beam image (as SEM real defects) for inexperienced users. The process is totally manual and time consuming, which requires a lot of experience. Moreover, current methods are not robust to optical image distortions, even for logic regions.
Accordingly, it would be advantageous to develop systems and methods for determining a position of a defect in an electron beam image of a wafer that do not have one or more of the disadvantages described above.